Using DS1307 I2C RTC (Real Time Clock) : MIND-TEK.NET

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Using DS1307 I2C RTC (Real Time Clock)

RTC (Real Time Clock) is very useful feature that can be applied to many of electronic products, Although we can use timer that’s built in microcontroller for timing, but microcontroller can’t operate without power supply. For this reason using timer in microcontroller for real time clock is not suitable for some application

DS1307 is Dallas Semiconductor’s serial RTC IC, that can provide full binary-coded decimal (BCD) clock/calendar plus 56 bytes of NV SRAM. Address and data are transferred serially via a 2-wire, bi-directional bus. Clock/calendar provides second, minutes, hours, day, date month, and year information, Clock operates in either 24-hours or 12-hours format with AM/PM indicator. DS1307 has built-in power sense circuit that detects power failures and automatically switches to battery supply mode. Pin assignment of DS1307 is shown in Figure 1

DS1307 pin assignment

Figure 1 Pin assignment of DS1307

VCC: Primary Power Supply
GND: Ground                                                                          
VBAT: +3V Battery Input
SDA:  I2C Serial Data
SCL: I2C Serial Clock
SQW/OUT: Square Wave/Output Driver
X1, X2: 32.768 kHz Crystal Connection

I2C (Inter-IC Communication) was developed by Phillips Semiconductor. Transferring data need only 2 wire, that are SDA (Serial Data line) and SCL (Serial Clock line). I2C Bus must be controlled by a master device that generates the serial clock (SCL), control bus access, and generates the START and STOP condition. DS1307 operates as a slave device on the serial bus and are controlled by master device. Typical bus configuration using 2-wire protocol as shown in Figure 2

In case of using more than 1 slave device in bus, slave can be connected to the bus parallely, each slave communication can be separate by slave address byte that will be send after start condition

DS1307 circuit

Figure 2 I2C bus configuration for DS1307 connected to microcontroller

There are 2 rule for I2C bus communication

  1. Data transfer may be initiated only when the bus is not busy
  2. During data transfer, data line must remain stable whenever the clock line is HIGH. Change in the data line while the clock line is high will be interpreted as control signals

Accordingly, the following bus conditions have been defined and operate as in figure 3

  1. Bus not busy: Both data and clock line remain HIGH
  2. Start data transfer: A change in the state of the data line, from HIGH to LOW, while the clock is HIGH defines a START condition
  3. Stop data transfer: A change in the state of the data line, from LOW to HIGH while the clock line is HIGH, defines the STOP condition
  4. Data valid: The state of the data line represents valid data when, after a START condition, the data line is stable for the duration of the HIGH period of the clock signal. The data on the line must be changed during the LOW period of the clock signal. There is one clock pulse per bit of data

Each data transfer is initiated with START condition and terminated with STOP condition. The number of data byte transferred between START and STOP are not limited, and is determined by the master device. 2 wire bus specifications a regular mode (100kHz clock rate) and a fast mode (400kHz clock rate) are defined. The DS1307 operates in the regular mode (100Khz) only

  Acknowledge: Each receiving device generate an acknowledge bit after the reception of each byte by pull down SDA line while master device generate an extra clock pulse on SCL line

i2c timing

Figure 3 Timing for transferring data by I2C bus

Writing data to DS1307 as shown in figure 4, Serial data and clock are received through SDA and SCL. After each byte is received an acknowledge bit is transmitted. START and STOP conditions are recognized as the beginning and end of serial transfer. The address byte is the first byte received after the start condition is generated by master. The address byte contains the 7 bit DS1307 address, which is 1101000, follow by direction bit (R/W) which for a write is “0”, After DS1307 acknowledge the slave address + write bit, master will then begin transmitting each byte of data with DS1307 acknowledging each byte received. The master will generate a stop condition to terminate the data write and back to bus not busy condition

ds1307 writing

Figure 4 Writing data to DS1307 via I2C bus

Reading data from DS1307 as shown in figure 5, serial data is transmitted on SDA by the DS1307 while the serial clock is input on SCL. START and STOP conditions are recognized as the beginning and end of a serial transfer. The address byte is the first byte received after the start condition is generated by the master. The address byte contains the 7-bit DS1307 address, which is 1101000, follow by direction bit (R/W) which, for a read is 1. After receiving and decoding the address byte the device inputs an acknowledge on the SDA line. The DS1307 then begins to transmit data starting with the register address pointed to by the register pointer. If the register pointer is not written to before the initiation of a read mode the first address that is read is the last one stored in the register pointer. The DS1307 must receive a “not acknowledge” to end a read

ds1307 reading

Figure 5 Reading data from DS1307 via I2C bus

The address map for RTC and RAM registers of the DS1307 is shown in figure 6 The RTC registers are located in address location 00H-07H. RAM registers are located in address locations 08H-3FH

Information of time and calendar are in BCD format. Time can be run either 12-hour or 24-hour mode. Bit 6 of the hours register is defined as the 12 or 24 hour mode select bit. When high, the12-hour mode is selected. In the 12-hour mode, bit 5 is the AM/PM bit with logic high being PM. In the 24-hour mode, bit 5 is the second 10 hour bit (20-23 hour) 

ds1307 register

Figure 6 Internal register address mapping for DS1307

Control register in 07H address is use for control the operation of the SQW/OUT pin
OUT (Out control): use for control the output level of the SQW/OUT pin when the square wave output is disable. If SQWE = 0, the logic level on the SQW/OUT pin is 1 if OUT= 1 and is 0 if OUT = 0
SQWE (Square Wave Enable): use for control oscillator in DS1307, when set to “1” will enable the oscillator output               

RS (Rate Select): These bits control the frequency of the square wave output when the square wave output has been enable. Table 1 lists the square wave frequencies that can be selected with the RS bits

Table 1 Square wave output frequency






1 Hz



4.096 kHz



8.192 kHz



32.768 kHz

In test as shown in figure 7 DS1307 is controlled by P89V51RD2, which is MCS-51 microcontroller working as master, SCL and SDA are connected with P2.5 and P2.6 of P89V51RD2. SQW/OUT is not use to generate interrupt or count signal to master device, so we have to do loop checking internal register of DS1307. Information of hour, minute, and second will be shown out by HyperTerminal via serial connection as shown in figure 8

ds1307 testing circuit

Figure 7 DS1307 Testing circuit

In program P89V51RD2 will keep checking serial port and internal register of DS1307, when there are data “r” coming in serial port, P89V51RD2 will write all date time in Flash memory to DS1307 and setting DS1307 to work in 24 hour time mode, In case of coming data is “s” P89V51RD2 will read out all of date time data in DS1307 and send it out to serial port as shown in HyperTerminal in figure 8

P89V51RD2 also keep checking internal register address 01H in DS1307, that is use to store timing data in unit of minute. When data in this register was changed by DS1307operation, P89V51RD2 will read data of hour and minute in DS1307 and send it our to serial port as shown in figure 8

hyperterminal ds1307

Figure 8 Testing of using DS1307

C Source code can be downloaded from or download hex file from, Data sheet of DS1307 can be download from


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